Embodiments of the invention relate to redundant routing systems, and in particular, faulty recovery mechanisms for a two-dimensional (2-D) network on a processor array.
A processor array contains and manages multiple processing elements. There are different types of processing elements, such as microprocessors, microcontrollers, digital signal processors, graphics processors, reconfigurable processors, fixed function units, hardware accelerators, neurosynaptic neural core circuits, etc. A processor array may include different types of processing elements. The processing elements may be arranged in a one-dimensional array, a two-dimensional array, or a three-dimensional array, or a ring or torus topology. The processing elements are interconnected by a routing system including buses and switches. Packets are communicated between processing elements using the routing system.